1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and, more particularly, to a method of manufacturing a high voltage transistor in a flash memory device, which can prohibit a punch leakage current of an isolation film while satisfying active characteristics of the high voltage transistor without the need for a mask process for field stop of the high voltage transistor, ion implantation process, and a mask removal process.
2. Discussion of Related Art
In case of a NAND type flash memory device, in order to satisfy the characteristics of a transistor in an active region and an isolation punch leakage, in forming a high voltage NMOS transistor, an ion implantation for controlling a threshold voltage of the high voltage NMOS transistor and a field stop ion implantation of the high voltage NMOS transistor are performed using different masks. This causes the number of entire process steps and the number of masks to increase, thus resulting in reduction of the productivity.
FIG. 1 is a sectional view for explaining a method of manufacturing a high voltage transistor of a conventional flash memory device. In FIG. 1, a reference numeral indicates a semiconductor substrate, 8 a gate oxide film for a high voltage device, 12 a gate oxide film for a low voltage device, 14 a polysilicon film, 16 a pad nitride film, 18 a trench and 19 a high voltage NMOS transistor field stop ion implantation.
As shown in FIG. 1, in forming the field region of the high voltage NMOS transistor, a field stop ion implantation mask for the high voltage NMOS transistor is formed to overlap 0.5 um in the active region. Field stop ion implantation process of the high voltage NMOS transistor is then performed. The reason why the mask overlaps in the active region is for the doping profile of field stop ion implantation of the high voltage NMOS transistor not to affect the active region. Accordingly, a portion for which field stop ion implantation of the high voltage NMOS transistor is performed does not cover the entire bottom of the trench isolation film but is locally formed at the bottom. At this time, the depth of the trench in the isolation film is about 300 Å. In order to perform field stop ion implantation of the high voltage NMOS transistor as above, not only a mask used in the photolithography process is required but also several process steps such as a photoresist covering process, a photoresist exposure process, a photoresist development process, a field stop ion implantation process, a photoresist removal process, etc. have to be carried out.
Meanwhile, in case of the active region, in order to satisfy a high voltage characteristic required for the NAND type flash memory device, ion implantation process for controlling the threshold voltage of the high voltage NMOS transistor is applied for a P type substrate by using a mask for controlling the threshold voltage of the high voltage NMOS transistor.
As such, in the prior art, the ion implantation process for controlling the threshold voltage of the high voltage NMOS transistor and the field stop ion implantation of the high voltage NMOS transistor are performed separately.